IS200SPROH2ADD MARK VI GE PPRO

Product name:
IS200SPROH2ADD MARK VI GE PPRO

Product model: IS200SPROH2ADD

Quantity: inventory

Part No./PN: IS200SPROH2ADD

Warranty: We provide warranty service for IS200SPROH2ADD

Shipping Port:FuJian

Product technical documents: no relevant documents

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Description

GE General Electric Technical Specifications: IS200SPROH2ADD

The MDX-DRAM is IS200SPROH2ADD designed to be a RAM memory

expansion board for the Mostek MD Series of Z80-based

microcomputers. It is available in two memory capacities,

16K bytes (MDX-DRAM16) and 32K bytes (MDX

DRAM32A). The IS200SPROH2ADD MDX-DRAM 16 and the MDX-DRAM32A

are available in both 2.5 MHzand4 MHz versions. Thus, the

designer can choose from the various options to add-on

dynamic RAM memory to satisfy system requirements.

The MDX-DRAM block diagram, with the majorfunctions of

the MDX-DRAM, is shown in Figure 2. The MDX-DRAM

provides a low cost way to expand RAM for the MDX

system.

 

brand Product Name Product model Order No
GE Fanuc Module card IS200SPROH2ADD nothing
Place of Origin Marketable land Imported or not defects liability period
Europe and America Nationwide and overseas yes a year
Place of shipment Delivery method How to use Applicable industries
Xiamen Shunfeng Express Commissioning and installation Power Plant Steel Plant Cement Plant Shipboard Papermaking
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The IS200SPROH2ADD memory array consists of either 8 or 16 MK41 08 or

MK4116 Dynamic Memories. The RAMs are organized into

two banks of eight RAMs each. The eight RAMs of each

bank contribute one byte to an addressable location. The

total storage capacity of the MDX-DRAM is 32,768 bytes.

Memory Decode and Control

The memory decode and control section is responsible for

generating the necessary timing signals of the memory

array, mux, and data buffer. Timing within the memory

decode and control section is generated by a TTL buffered

delay line.

Address Multiplexer (MUX)

The address multiplexer is responsible for taking the

address bits from the address buffers and converting them

into a row and column address for the memory array. The

address multiplexer is controlled by the IS200SPROH2ADD memory decode and

control section.

The data buffer isolates the memory array from the data bus

and is controlled by the memory decode and control section.

Memory Device Selection Jumpers

Table 1 shows how jumpers A-K are configured for the

different MDX-ORAM boards.

Memory Decoding

Memorydecoding for the MDX-DRAM is on 4K boundaries,

OOOOH, 1000H, 2000H, and so on. The starting address for

the MDX-DRAM is selected by a four-position DIP switch

located in U28. Table 2 shows the switch setting for U28

versus starting address.

NOTE: The address select switch only sets the starting

address for the memory board. If, for example, an MDX

DRAM32 board is positioned to starf at FOOOH, the

remaining 28K of memory will “roll over” at OOOOH and

continue up to 6FFFH.

Why are the prices of many products of our company more competitive?
(1) Source purchase to reduce the price difference in the intermediate phase
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Lead time problem
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livery can be arranged on the same day after the contract payment is signed
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For the simple purchase procedure of spare parts, ensure that they are delivered to the site in a timely manner, and help users reduce the risk of downtime caused by the shortage of spare parts
The emergency spare parts support service is complete, and the user can customize the spare parts. The quality of the spare parts is reliable. All the spare parts provided enjoy a one-year super long warranty
Spot stock, fast response, reduce user capital investment, improve spare parts utilization, spare parts replacement!

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