ABB PFVI 102 YM110001-SN Transformer power supply

Description

Pulse count is done by pulse accumulation in a 16 bit pulse counter. The pulse

counter value is continuously loaded into the pulse register.

The value of the pulse register (that is, actual pulse count value) is read by the CPU,

and transferred to the ModuleBus master.

Frequency (speed) Measurement.

The frequency measurement function consists of two counters, that is, the SX and

SR counters. The SX counter is used to count number of pulses (Sx) from the

unknown input frequency. The SR counter is used to count the number of pulses (Sr)

from a reference frequency source with frequency FREF. The frequency value (Fx) is

calculated as:

Fx = FREF x Sx / Sr

The SX counter is implemented by a 12 bit up-counter. The SR counter is

implemented by a 20 bit up-counter.

The SX and SR counters accumulates pulses during a measurement period.

The measurement interval for each channel defined by the user to 10 ms, 20 ms,

50 ms or 100 ms. By changing the measurement interval the user can select a

suitable filter time (integration time) with respect to the application’s requirements.

At the end of each measurement period are the SX and SR registers is updated with

the value of the SX and SR counters. The CPU reads the content in the SX and SR

registers and calculates a frequency value.

The reference counter (SR) has a overflow detection function. The SR overflow will

be activated if no incoming pulses has been detected during 3 s. When the CPU

detects SR overflow, is the frequency value set to zero.

Redundant Applications

In a redundant application one module is set to primary and one to backup. The

primary module synchronize the counter on the backup module every 10 seconds.

After start-up it will take about 30 s before the backup has been synchronized

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