Description
Snapshot 5X00109G01 on trailing edge of external signal
1 = Snapshot the pulse counter contents upon the
trailing edge of the external SNAPSHOT input.
0 = Snapshot the pulse counter contents upon the
leading edge of the 5X00109G01 external SNAPSHOT input.
Snapshot on trailing edge of external
signal confifiguration bit status.
10 ENABLE for counter OFF input
1 = The assertion of the external ENABLE input
disables the pulse counter.
0 = The assertion of the external ENABLE input
enables the pulse counter.
ENABLE for counter OFF input
confifiguration bit status.
brand | Product Name | Product model | Order No |
EMERSON | modular | 5X00109G01 | nothing |
Place of Origin | Marketable land | Imported or not | defects liability period |
Europe and America | Nationwide and overseas | yes | a year |
Place of shipment | Delivery method | How to use | Applicable industries |
Xiamen | Shunfeng Express | Commissioning and installation | Power Plant Steel Plant Cement Plant Shipboard Papermaking |
Service advantages | Foreign import, goods preparation and supply | Reasonable price and reliable quality | Pictures are for reference only |
Product features | Primary source of goods, supply by model | After sales guarantee | Chen 1810693-7731 |
inputs.
1 = Bypass the 5X00109G01 external ENABLE and SNAPSHOT
inputs de-bounce circuits.
0 = Enable the external ENABLE and SNAPSHOT
inputs de-bounce circuits.
Disable de-bounce on ENABLE and
SNAPSHOT inputs 5X00109G01 confifiguration bit
status.
12 Not Used 1 = The external ENABLE input is
asserted
0 = The external ENABLE input is not
asserted.
13 Not Used Not Used.
14
15
00 = Pulse counter input is the external COUNT
input.
01 = Pulse counter input is the 1 Khz internal
timebase.
10 = Pulse counter input is the 10 Khz internal
timebase.
11 = Pulse counter input is the 100 Khz internal
timebase.
Count Select Bits.
Count Select Bit confifiguration bits status.
When Bit 0 = 1, the Pulse 5X00109G01 Accumulator module is configured and all
module registers can be written to and read from. When Bit 0 = 0, Pulse
Accumulator module registers that are assigned offset addresses below
12 (C in Hex) cannot be written to or read from, and both pulse counters
are reset.
Bit 1: This bit, when set to “1”, forces an internal error. This will generate an
“attention status” reply for any Ovation 5X00109G01 Controller access of a module
register with an offset address less than 12 (C in Hex). The logic card’s
ERROR signal is the logical OR of the Internal Error and External Error
(Blown Fuse) status signals.
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Lead time problem
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For the simple purchase procedure of spare parts, ensure that they are delivered to the site in a timely manner, and help users reduce the risk of downtime caused by the shortage of spare parts
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