Description
GE General Electric Technical Specifications: IS200IVSHG1A
A restriction for slave access to the IS200IVSHG1A controller register, when
the DMA is not enabled, is that they be accessed per SASI
protocol. That is, the COMMAND/STATUS register can
only be accessed when a command or status transfer is
required; the SELECT register may be accessed only when
the controller is to be selected; the DATA register may only
be accessed when data is to be transferred. If IS200IVSHG1A access to any
of these registers is attempted when the SASI interface is in
the wrong phase, the VME-SASI will not respond with a
DTACK*. Table 5 specifies the SASI signal conditions
required for legal access to the controller registers. Note
that for any slave access to be legal, the DMA must not be
enabled (DMAEN=O in CSR).
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CSR register. Programming the interrupt level to 0 or 7
disables any interrupt requests IS200IVSHG1A from being generated.
Interrupt requests are issued for the following conditions:
- a) After any DMA operation is completed. Completion of a
DMA is defined to be when the byte counter counts down to
zero or the controller has completed a command.
- b) After a bus error occures during a DMA The
address where the error occurred remains in the DMA
address register.
Operating Modes
One of four operating modes IS200IVSHG1A can be selected for DMA
operations. The mode is selected by setting the MODE bits
of the CSR register to the binary value of the mode number
desired. The four modes are described below.
Mode 0
This mode allows data transfers with the controller actually
transferring the data to memory. Each data transfer from or
to the controller requires a handshake sequence to be
performed. When the DMA is enabled, handshakes are
performed until the byte counter goes to zero. Then an
interrupt request is issued, and the DMA is disabled.
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