Description
GE General Electric Technical Specifications: IS200PICHG1A
The CPU4 can support a IS200PICHG1A phantom ROM type of operation
where the ROM has just enough code to bring a larger
operating system into RAM, then by switching to another
map, IS200PICHG1A disables the ROM dynamically and begins operation in
a purelyHAM configuration. A very simple method to do this
is to have memory map 0 In the confilluration PROM act ,as
the boot-up map and then switch to a desired map
configuration. This procedure is then followed:
A Copy the ROM code into the RAM at the same address
range as the ROM.
- Switch maps by outputting a new map number to the,
Memory Configuration port (OFFH), allowing the copy of
ROM in RAM code to enter the active memory.
| brand | Product Name | Product model | Order No |
| GE Fanuc | Module card | IS200PICHG1A | nothing |
| Place of Origin | Marketable land | Imported or not | defects liability period |
| Europe and America | Nationwide and overseas | yes | a year |
| Place of shipment | Delivery method | How to use | Applicable industries |
| Xiamen | Shunfeng Express | Commissioning and installation | Power Plant Steel Plant Cement Plant Shipboard Papermaking |
| Service advantages | Foreign import, goods preparation and supply | Reasonable price and reliable quality | Pictures are for reference only |
| Product features | Primary source of goods, supply by model | After sales guarantee | Chen 1810693-7731 |
IS200PICHG1A complete line of STD-Z80 BUS-compatible microcomputer
modules. The MDX-MATH board, based on the AM9511A
Arithmetic Processing Unit (APU), provides high per
formance fixed and floating point trigonometric and
mathematical operations. It can be used to enhance the
computational capability of a wide variety of STD-Z80 BUS
systems.
Figwe 2 is a block diagram which illustrates the functional
elements of the MDX-MATH board.
The Arithmetic IS200PICHG1A Processing Unit (APU) is a monolithic
MOS/LSI device that performs all of the mathematical
operations. All transfers to and from the APU take place
over the 8-bit, bi-directional data bus. Operands are pushed
onto an internal stack within the .APU and· a command is
issued to perform operationson·the data in ·the stack.
Results are then available to be retrieved from the stack, or
additional commands may be entered.
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Lead time problem
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