GE IS200RCSBG1BAA buffer

Description

GE General Electric Technical Specifications: IS200RCSBG1BAA

Sometime later, the CPU will IS200RCSBG1BAA send out an interrupt

acknowledge (INTAK). During INTAK, the interrupt logic of

the various peripheral chips in the system will determine

the highest-priority port which is requesting an interrupt.

This device then places the IS200RCSBG1BAA contents of its 8-bit interrupt

vector on the data bus for the CPU. The interrupt condition is

maintained until the end of the INTAK cycle. Lower priority

interrupts are inhibited until this device decodes an RETI

instruction or an equivalent command.

All Z-80 devices include daisy-chain priority-interrupt logic

that automatically IS200RCSBG1BAA supplies the programmed vector (from

the highest-priority interrupting peripheral) to the CPU

during interrupt acknowledge. To ensure that more than the

on-board SIO chip can be included in the interrupt priority

loop, “look-ahead” logic has been implemented on the

board. Both ends of the IS200RCSBG1BAA board daisy chain logic have been

brought to edge connector P1 so that the board priority

within a larger daisy chain system can be established.

Board priority is determined in the same fashion as an

individual peripheral chip i.e., through the high or low state

of PCI or PCO.

The MDX-4221 is a dual-channel, serial RS-422 interface

for use with STD-Z80 microcomputer systems. The module

incorporates RS-422 (balanced, differential) serial com

munication, allowing long-distance communication (4000

ft.) in noisy industrial environments between MDX-4221’s

and/or SCU’s (Serial Control Units). Each MDX-4221

channel is capable of driving forty devices in a party-line

configuration. The module is designed around the Mostek

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