GE IS200SCTLG1A static charge control board

Description

GE General Electric Technical Specifications: IS200SCTLG1A

The IS200SCTLG1A Digital liD Bus Interface Module (MDX-DIOB1) is a

board that provides a simple interface between the STD

Z80 Bus and Mostek’s Digital liD Bus. It provides parallel,

memory-mapped liD to a maximum of 64 8-bit ports. Using

16 of Mostek’s Digital 1/0 Panels (MDX-DIOP), MDX

DIOB1 is capable of servicing IS200SCTLG1A 256 relay modules.

Figure 2 is a block diagram illustrating the flow of address,

data, and control signals on the MDX-DIOB1. The main

elements of the board are address control, control logic, and

differential bus transceivers IS200SCTLG1A and drivers. Input and output

are handled by one 4O-pin connector. A reset signal is

encoded on the Digital 1/0 Bus so all MDX-DIOB1 output

peripherals can be latched to their off state when a

SYSRESET occurs.

The address decode circuit is used to enable the board by

comparing the upper ten IS200SCTLG1A address bits to preset strapping

options. REFRESH is used in the comparison circiut to

disable the board during a refresh cycle. A strapping option

to include MEMEX is also provided to allow compatibility

with MD systems using this signal.

The IS200SCTLG1A control logic section is used to generate the control

signals on the Digital liD Bus and to enable the data bus

transceivers in the proper direction. A one wait-state

generator is provided as a strapping option to allow a 4 MHz

operation with extended Digital 110 Bus lengths. All control

logic functions are disabled by the address decode circuit

with the exception of RESET which is enabled at all times.

DIFFERENTIAL TRANSCEIVER AND DRIVER CIR

CUITS

The differential transceiver and driver circuits are used to

receive data signals and to transmit address, data, and

control signals. Termination resistors are used at the data

bus receivers to minimize signal reflections on the Digital

liD Bus.

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