Description
GE General Electric Technical Specifications: IS200STCIH6ADD
Rectified AC IS200STCIH6ADD voltage from the voltage transformer module is
divided through a resistive network and used as an input to
a comparator (U2) with an internal reference. The
comparator “peak detects” the adjustable AC input which is
factory set to approximately 95 VAC as a brown-out
detection level. The IS200STCIH6ADD comparator outputtriggers a retriggerable
CMOS one shot (V2 of U3) with a period of 13 mSec. This
output generates the NMIRQ signal, and it also triggers a
second one shot (Y2 of U3) which inhibits the first one shot
for a period of 5 mSec. This second delay is necessary to
allow a software power-down subroutine to complete
before SYSRESET is generated.
brand | Product Name | Product model | Order No |
GE Fanuc | Module card | IS200STCIH6ADD | nothing |
Place of Origin | Marketable land | Imported or not | defects liability period |
Europe and America | Nationwide and overseas | yes | a year |
Place of shipment | Delivery method | How to use | Applicable industries |
Xiamen | Shunfeng Express | Commissioning and installation | Power Plant Steel Plant Cement Plant Shipboard Papermaking |
Service advantages | Foreign import, goods preparation and supply | Reasonable price and reliable quality | Pictures are for reference only |
Product features | Primary source of goods, supply by model | After sales guarantee | Chen 1810693-7731 |
When the IS200STCIH6ADD interrupt port OF7H (PFD board address) is read by
the power-down subroutine, a 0 in data bit 7 (D7) indicates
power fail condition which a 1 indicates no power failure.
The last instruction of the power-down subroutine should
be a write to port address OF7H. This will set the SYSRESET
flip-flop (Y2 of US) and cause SYSRESET to go low. The
above conditions will be maintained by battery backed up
CMOS logic until power is restored.
POWER UP SEQUENCE
When the power is detected by the MDX-PFD voltage
comparator circuit, a reset signal is released from a counter
(U6), allowing itto count. The IS200STCIH6ADD counter then releases NMIRQ,
nonmaskable interrupt request, causing it to go high after
approximately 130 mSec. Next the counter releases
SYSRESET, causing it to go high after approximately 260
mSec after AC power is detected, thus allowing normal
system operation to begin the power up subroutine starting
at address DOH or EOOOH. These delays are necessary in
order to allow DC power to stabilize after AC power has
been restored. Loss of power at any.time before system
reset goes high will cause the counter to be reset and the
130/260 mSec timer sequence to be repeated after AC
power is again restored.
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