Description
GE General Electric Technical Specifications: IS200STTCH2A
The IS200STTCH2A MOX-BCLK interface consists of two ports. When a
write (OUT) is performed to the low order port (XXXXXXX 0)
the control register is accessed. When a read (IN) ,is
performed from the low order port, the desired clock data is
accessed. Two IS200STTCH2A successive writes (OUT) to the high order
port (XXXXXXX 1) increment a particula’r counter depend
ingon the state of the control register, Reading the high
order port has no function and irrelevant data will be
obtained.
brand | Product Name | Product model | Order No |
GE Fanuc | Module card | IS200STTCH2A | nothing |
Place of Origin | Marketable land | Imported or not | defects liability period |
Europe and America | Nationwide and overseas | yes | a year |
Place of shipment | Delivery method | How to use | Applicable industries |
Xiamen | Shunfeng Express | Commissioning and installation | Power Plant Steel Plant Cement Plant Shipboard Papermaking |
Service advantages | Foreign import, goods preparation and supply | Reasonable price and reliable quality | Pictures are for reference only |
Product features | Primary source of goods, supply by model | After sales guarantee | Chen 1810693-7731 |
When the IS200STTCH2A DO bit of the control register makes a transition
from low to high (positive edge), the clock resets to zero
(00:00:00). As long as the bit remains in the high condition,
the 1 Hz input to the clock counter chain is disabled.
The disable function is level triggeredcFor instance, if DO is a
high level and a reset function is desired, the bit must be
“dropped” to a Iqw level and then “raised” to a high level.
D1-Calendar Reset
When the 01-bit of the control register makes a transition
from low to high (positive edge), the calendar resets to
January 1 (01,01).
D2-Second Read/Second Set
When the 02 bit of the IS200STTCH2A control register is a high level, the
second read/second set function is enabled, With the 02 bit
set, and a read performed on the low order port, “second”
data appears in BCD format. The bit also serves as the
second set. When two successive writes (OUn are
performed on the high order port, the “seconds” counter
advances by one second.
D3-Minute Read/Minute Set
When the 03 bit of the control register is a high level, the
minute read/minute set function is enabled. When 03 bit is
set and a read performed on the low order· port, “minutes”
appears in BCO format. The bit also serves as the minute
set. When two successive writes (OUT) are performed on
the high order port, the “minute” counter advances by one
minute. After the “minute” counter reaches fifty-nine and is
incremented one more time, the “hour” counter advances
one hour. Note: The hour counter must be set through the
minute counter.
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