Description
GE General Electric Technical Specifications: IS200TTURH1CFD
Two registers in PCIBAR0 are used to implement the PCI PIO Sliding Windows.
The IS200TTURH1CFD LAS1BA register (Direct Slave Local Address Space 1 Range, PCIBAR0 Offset
$F0) is read‐only. It is determined by switch settings and the installed memory
option. The LAS1RR (Remap) register (Direct Slave Local Address Space 1 Local
Base Address, PCIBAR0 Offset $F4) is writeable in bits 27:21. The 32‐bit register
masks off invalid upper and lower bits based on switch and installed memory
settings (defaults to $00000001).
brand | Product Name | Product model | Order No |
GE Fanuc | Module card | IS200TTURH1CFD | nothing |
Place of Origin | Marketable land | Imported or not | defects liability period |
Europe and America | Nationwide and overseas | yes | a year |
Place of shipment | Delivery method | How to use | Applicable industries |
Xiamen | Shunfeng Express | Commissioning and installation | Power Plant Steel Plant Cement Plant Shipboard Papermaking |
Service advantages | Foreign import, goods preparation and supply | Reasonable price and reliable quality | Pictures are for reference only |
Product features | Primary source of goods, supply by model | After sales guarantee | Chen 1810693-7731 |
Consider this example with a PCI PIO window set to 2 MByte. First, the firmware
IS200TTURH1CFD will set the range register to $FFE00000 to indicate a 2 MByte PCI PIO window.
Next, the system (BIOS) will set the PCI Base Address (PCIBAR3) on a 2 MByte
boundary. For example, the BIOS could set the PCIBAR3 to $F7600000 (allowing a
PCI window up to $F77FFFFF). This serves as the PCI Base Address for PIO
access to the local Reflective Memory address space. The firmware also defaults
IS200TTURH1CFD setting the Remap Value to 0 at the beginning of the installed memory address.
space. This gives the user application PIO access to the Reflective Memory
locations $00000000 up to $001FFFFF. The user application can set the Local Base
Address (Remap) register pointing to any valid window in the installed memory.
For example, the user application can write $00200000 to the Remap register to
access the second 2 MByte PCI PIO window. The register value will be $00200001
since bit‐0 is hardwired to 1. This gives the user application PIO access to the
Reflective Memory locations $00200000 up to $003FFFFF. The user application
uses the same PCIBAR3 window ranging from $F7600000 up to $F77FFFFF
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