HIMA F7126 24 VDC Power Module Compact System

Description

F7126 The 5 V DC power supply does not have to be wired extra as it is already

part of the installation.

To supply the I/O racks the 5 V power supply with corresponding GND is

available at the rear side of the central rack.

The 5 V DC power needed for the microprocessor F7126 system and as control

current for the I/O F7126 modules is generated from the 24 V DC power of the

system via clocked 24 V DC/ 5 V DC power supply modules bearing the

F 7126 identification. One central rack can be equipped with a maximum

of 3 power supply modules. The power supply modules are switched in

parallel. One or two power supply modules are usually able to supply the

PES. A further power supply module is used to increase availability.

F7126 The output voltage of the power supply modules is checked as to under

voltage or failure by the monitoring module F 7131.

In case of a faulty power supply module the operating system supplies the

user’s program via a system variable with this information.

In case the 5 V system power fails F7126 hardware clock and sRAM on the cen

tral module are buffered by one lithium battery on the central module.

Two lithium batteries on the power supply monitoring module F 7131 are

to buffer the sRAM on the coprocessor module.

4.2.8 F7126 The I/O Bus

The data connection of the I/O level with the central device is established

via the I/O bus. The I/O bus coupling modules are already integrated in the

central rack. With the I/O rack the connection to the I/O bus is via a cou

pling module F 7553 installed in slot 17. The connection of the bus bet

ween the individual subracks is establiblished at the rear side via the

BV 7032 data cable.To terminate the I/O bus, an F 7546 module is plug

ged in at the beginning and the end.

The construction principle is shown on the following page.

– Microprocessor

– Flash-EPROMs of the program memory for the operating system and

the user’s program usable for min. 100.000 writing cycles

– Data memory in sRAM

– Multiplexer to connect I/O bus, DPR and redundant CU (not used in

the H51q-M system)

– Dual Port RAM for fast memory access to the second central module

(not used in the H51q-M system)

– 2 interfaces RS 485 with galvanic isolation. Transmission rate: max.

57600 bps. Set to 9600 bps and to 57600 bps by switch, or setting

also of other transmission rates by software (the software values have

priority)

– F7126 Diagnostic display and 2 LEDs for information out of the system, I/O

level and user`s program

– Power supply monitoring

– I/O-Bus logic for the connection to the input/output modules

– Hardware clock, battery backed

– Fail-safe watchdog

– Battery backup of the sRAMs via batteries on the central module with

monitoring.

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Lead time problem
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For the simple purchase procedure of spare parts, ensure that they are delivered to the site in a timely manner, and help users reduce the risk of downtime caused by the shortage of spare parts
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