NI PXI-1033 chassis container

Description

NI PXI-1033 chassis container

Contact National Instruments to order the following options for the PXI-1031/PXI-1031DC chassis. EMC Filler Panels Optional EMC filler panel kits are available from National Instruments. Rack Mount Kits A rack mount kit option is available for mounting the PXI-1031 or PXI-1031DC chassis into a 19 in. instrument cabinet. Handle/Feet Kit An optional side handle and rubber feet kit is available from National Instruments to provide a handle for portability.

The PXI-1031/PXI-1031DC backplane is interoperable with 5 V and universal PXI-compatible products and standard CompactPCI products. This is an important feature, because some PXI systems may require components that do not implement PXI-specific features. For example, you may want to use a standard CompactPCI network interface card in a PXI chassis.

The signals on the backplane P1 connectors meet the requirements of the CompactPCI specification for both peripheral and system modules. Refer to Appendix B, Pinouts, for pinout information. The PXI-specific signals are on the backplane P2 connectors and are found only on those signal lines reserved or not used in the CompactPCI 64-bit specification.

To build a custom DC cable, be sure to note the positive (+) and negative (–) terminals shown in Figure 2-2. Use the following components or their equivalents to mate to the P1 port:

• Positronic connector, part number CBD7W2F0000

• Positronic hood, part number D15000GE0

• Two Positronic contacts, part number FS4008D (choice of solder cup or crimp terminals)

• Use of UL listed AWG #10 wire is recommended (maximum length: 216 in.)

Therefore, all modules that meet the requirements of the CompactPCI 64-bit specification will function in the PXI-1031/PXI-1031DC. Refer to Appendix B, Pinouts, for pinout information. The chassis backplane has +5 V V(I/O). Refer to the CompactPCI Specification PICMG 2.0 R 3.0 for details regarding V(I/O).

The PXI backplane local bus is a daisy-chained bus that connects each peripheral slot with adjacent peripheral slots to the left and right (refer to Figure 1-5). For example, the right local bus of slot 2 connects to the left local bus of slot 3, and so on. The left local bus signal lines on slot 2 are used for star trigger and do not connect to slot 1.

The right local bus signal lines on slot 4 are not routed anywhere. Each local bus is 13 lines wide and can pass analog signals up to 42 V between cards or provide a high-speed TTL side-band digital communication path that does not reduce the PXI bus bandwidth. Initialization software uses the configuration information specific to adjacent peripheral modules to evaluate local bus compatibility.